| ONLINE COURSE
Building your own RISC-V Processor
Learn to design digital logic for ASICs and FPGAs using next-generation Verilog (Transaction-Level Verilog) design in the online Makerchip IDE. In just a week, you can build and simulate a pipelined RISC-V CPU core from your browser. After this course, you will understand digital logic design concepts and advanced design methods. You'll become familiar with the RISC-V instruction set architecture, and you'll understand how a CPU executes RISC-V instructions to run a computer program.This course is appropriate for newcomers to digital logic and experts alike. Industry veterans will refresh their toolbox with a fresh perspective on familiar concepts, learning an approach to logic design that has not been possible until recently.
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