Clearance required for 20 A power nets
Satyaveer Singh Rawat , 05-04-2024, 01:16 PM
Dear all, I have designed power nets with the help of Polygon for Max current of 20 A. Please guide me for following: 1. What is the safe clearance between two polygons/tracks for mentioned current rating?2. I have attached the screenshots of a PCB board in 4 parts for zoomed version. In PCB board tracks are used for signals while polygons for power nets. What are the errors keeping the clearance in mind ? (Other errors/suggestions are also welcomed) For clearance issue like:-> Islanded pad J21 connected to "PV2_Vol_Pos" is surrounded by Polygon net "DC_Bus1_Vol_Neg" by default clearance setting (10 mils as I know). So(i) Is this the safe clearance for 20 A current?(ii) If not how can I change that clearance?
Mini , 05-05-2024, 03:53 PM
Clearances depend on voltages not on current. What are your power supply voltages?
Satyaveer Singh Rawat , 05-05-2024, 05:04 PM
400 V at the input of inverter while 230 V at the output side. So voltage level between 230 V to 400 V
SirJames , 05-05-2024, 05:37 PM
How experienced are you in PCB design? Did someone asked you to draw this PCB or is it only for your DIY stuff?
SirJames , 05-05-2024, 05:38 PM
Either way, playing with mains voltage is not a joke and even experienced designers needs to consider many factors like isolation between HV and LV stuff, EMC, fault protections, different kinds of certifications, etc.
Satyaveer Singh Rawat , 05-05-2024, 05:51 PM
@SirJames I have less experience in Altium and I am designing it by my own as per the requirement of my work, that's why raising queries here? Your suggestions (if any) are welcome. You can guide me in correct direction if you are so much experienced.
SirJames , 05-05-2024, 05:55 PM
I have found this calculator https://www.protoexpress.com/tools/pcb-conductor-spacing-and-voltage-calculator/
SirJames , 05-05-2024, 05:59 PM
Not trying to be rude but for your own safety I hope that in your company there is someone who is overlooking your work. 8kw inverter PCB sounds like a job for team of HW engineers (lead by senior engineer).
Satyaveer Singh Rawat , 05-05-2024, 06:15 PM
Thank you for your genuine concern . Yes 8kW is very high power but I am designing this for 1 kW power and I know there must be many mistakes even may look absurd in some sense but I am trying my best to learn. Altium is new for all of us in my lab.
QDrives , 05-06-2024, 01:01 AM
For the clearance there are at least 4 parts for this design.1) The clearance the fabricator requires. This is only for the low voltage signals, but since you mention 20A, you will use thicker copper and hence, the clearance needs to be bigger too.2) IPC 2221 table. I use PCB toolkit, but I expect it to be the same as Sierra Circuits.3) Regulation, like IEC 60335, IEC 60950, IEC 60664, etc.4) The creepage and clearance requirements from primary to secondary!The clearance goes roughly from small to big in this list too."Yes 8kW is very high power but I am designing this for 1 kW power..." -- It is not the power that is the cause for the warning, it is the voltage. Enough to kill you.
Mini , 05-06-2024, 12:21 PM
To add previous answers, i would also suggest PCB cutouts between low voltage and high voltage. But indeed these voltages are no joke. There is enough energy to kill you.
QDrives , 05-06-2024, 08:52 PM
"PCB cutouts" -- the proper name for that is "creepage", as mentioned in my point 4.Creepage is the distance needed across a surface as the surface may get wet (ie. condensation) and then start to conduct.
Mini , 05-10-2024, 09:29 AM
Sorry, i'm not native english speaker.
QDrives , 05-10-2024, 07:55 PM
No problem. They are cutouts, but they are for the creepage. Searching for cutouts does not help, creepage gives you the correct results for the reason as well as the requirements (ie IEC 60664).
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