FEDEVEL
Platform forum

Eoliveira , 09-27-2017, 07:16 PM

Hello Everyone.

Can you help me, please ?

I'm trying understand a detail in our schematic...

1. What means "DF" under componnent symbol in our schematic ? I think that when my board will go to manufacture that componnent won't be assembled. Am I correct? Is it an optional componnent to another configuration to power supply?
2. About the Layer 4 (Polygon). If I Dont't have in my board the following componnent ( DNF - R2 = 10R )... How the signal +5V_LDO will go to L4 (Polygon) ?
3. Is +5V_LDO and + 5VCC the same signal on L4 ( Polygon )?

Thanks

mairomaster , 09-28-2017, 02:23 AM

You are correct - DNF means do not fit. You can also see it by DNP (do not populate) or NF (no fit). I don't have the schematics at the moment to answer the rest of the questions.

mairomaster , 09-29-2017, 03:08 AM

I realised I have the project available.

I don't have much information about the design, but on a first look it seems that PVCC can be connected to either LDO, VIN or 5V_VCC. By default it is connected to LDO by R1. The L4 plygon is connecting all 5V_VCC nodes.

Robert will be able to explain much better, since he designed the circuit. I don't have much free time, so I can't check the datasheet of the IC.

robertferanec , 09-29-2017, 06:26 PM

1. Yes, you are right and also as @mairomaster explained, DNF = Do Not Fit this component
2. Very good question. Basically, it is not described directly in datasheet, but for very small currents you can use VCC pin (the pin 3, signal +5V_VCC) as source of 5V
3. The polygon is +5V_VCC.