Hello,
Currently, I am working in a design with different high speed signals (RGMII, DDR3, eMMC...) and I have a doubt about the reference planes for this signals.
In my previous designs, with this signals I made a "sandwich" between the GND and the power plane of that particular signal. For instance, 1V5 and GND for DDR3 or 1V8 and GND for RGMII (see pictures).
I do that because I understand that with high-speed signals, the power plane and the GND plane are almost the same reference and I don't want that any signal of the DDR3 bus cross a power plane split or to be under a voltage different from its voltage reference.
My question is, if I have the signals in a layer between the GND plane and the PWR plane, do I need to do that sandwich or the power plane is independent since I have the GND plane as reference? If only the GND reference is needed, does it depend on the proximity to the planes? I mean, you need to put closer (thinner prepeg/core) the reference plane you want to use.
Thank you very much in advance.