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Bermell , 06-25-2022, 01:17 PM

Hello,

I have always seen that a VIA, has the same annular ring diameter, in all its layers. For example, you can check the VIAs in the OpenRex board.

In the following link https://www.altium.com/documentation...n?version=16.1
you can read the following recomendation for VIAs: "Removing unused annular rings on layers that the via is not connected to"

What do you think about this ? Can it be a good recomendation when you are routing memory chips ?


Thank you very much in advance

Steve.Picotest , 06-25-2022, 01:24 PM

That depends. It won't reduce inductance, but will reduce capacitance. In high speed design, the annular rings are part of the impedance structure, and will be assessed in the EM simulations

qdrives , 06-26-2022, 01:08 PM

While @Steve.Picotest talks about the high speed side of it, fabricators look at it from a manufacturing point of view.
Some fabricators want you to leave them so THEY can remove them if better for production, while others do not care.

robertferanec , 06-27-2022, 07:59 AM

Usually they are automatically removed when manufacturing outputs are generated. Also I heard many PCB manufacturers may remove them by default (in case they are left in the manufacturing outputs). However, in some case you may need to have control over that e.g. sometimes it helps to remove them when there is a very high density layout so you can put more tracks between holes (but don't forget often minimum required line to hole clearance is 0.2mm). Also as @Steve.Picotest mentioned you may need to know what is happening with these annular rings if for example impedance of vias is critical for your design.

Bermell , 06-27-2022, 12:23 PM

Thank you very much for your answers