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DDR4 SODIMM design questions.

gee , 02-23-2026, 10:03 PM
I'm working on a new hardware platform. Most of the design is within my wheelhouse, but this one has a DDR4 SODIMM socket connected to an FPGA which is something I haven't done before. I've been reading lots of app notes, watching lots of youtube videos (Robert's videos are a godsend) learning what I need to know.

Anyhow, there doesn't seem to be a "standard" DDR4 impedance - AMD suggests 50 ohm single ended trace impedances in their design guide. ISSI suggests 40 ohms, ST suggests 55 ohms. I suppose it doesn't matter if you're throwing down bare devices - as long as termination resistors and traces and ODT register settings match up I guess you're fine.

But since I'm designing with a SODIMM, which has its own onboard traces... is there a certain impedance I should target, so I don't end up with an impedance mismatch between my board and the DIMM?

I guess this is one question, but I might add to this later, lol

Thanks!
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