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Ground Split question

Noelia Scotti , 07-29-2024, 01:22 PM
I'm working as a freelance PCB designer. My first job is very hard... Spartan 7 FPGA with a lot of analog signals, so I need your advice!

I know that splitting GND planes is not a good idea, so I will use several solid GND planes on the board, this is clear. I don't want to separate analog and digital grounds.

But... the Xilinx user guide (https://docs.amd.com/r/en-US/ug480_7Series_XADC/Analog-Power-Supply-and-Ground-VCCADC-and-GNDADC) recommends adding a ferrite bead between GND and AGND. I know it is a bad idea and the PCB routing gets awful with this kind of ground separation. I attached an image of the development kit board (SP701), you can see how Xilinx routes a little polygon with the AGND net and gets to the FPGA with tracks. What do you think about it?
SirJames , 07-29-2024, 03:25 PM
Most older and some new datasheets of mixed-signal ICs contains information you should to split analog and digital grounds and connect them in single point. I guess they copy-paste some paragraphs from previous datasheets so they really aren't up to date with current knowledge. Could be your case as well.
Noelia Scotti , 07-29-2024, 03:31 PM
Yes, could be this case. But it is difficult to go against the manufacturer recommendation. Look at this image, one horrible track for the GNDADC net instead of connecting directly to the GND plane.
Robert Feranec , 07-29-2024, 04:48 PM
once we had problem with our product when we placed ferrite bead between agnd and dgnd on audio chip (it was in datasheet) .... ESD test would damage the chip when applied on the audio inputs - to fix this we had to replace the bead by 0R. I have not used ferrite bead in ground since. Also about splitting the grounds .... I would not be 100% convinced to do so even if it is in datasheet, I would maybe rather try to place everything close to each other and would try to be careful about the place where "AGND" currents would flow - but I am not sure if that is possible in your design.
Noelia Scotti , 07-29-2024, 06:04 PM
Yes, I would try to place analog components close to each other but it is difficult to reach the AGND FPGA balls. Thanks for your reply Robert!
QDrives , 07-29-2024, 08:22 PM
Did Xilinx place the sensitive analog in the middle of noisy digital pins???
Is it single ended analog input or differential?
What about routing all analog on a single layer with Gnd planes above and below it?
Noelia Scotti , 07-29-2024, 08:24 PM
Yes, Xilinx put the analog pins just in the middle of the BGA (believe it or not)
Noelia Scotti , 07-29-2024, 08:24 PM
These inputs are differential
Noelia Scotti , 07-29-2024, 08:25 PM
I can route all the analog on a dedicated layer, I have 18 layers but the problem is the ground split decision (ferrite or not)
QDrives , 07-29-2024, 08:28 PM
If the analog inputs are differential, splitting Gnd does not really help in my opinion.
Perhaps even have have power layers next to the Gnd layers. So a sequence of power - gnd - analog - gnd - power. Power for analog is on the analog layer.
Noelia Scotti , 07-29-2024, 08:41 PM
Ok, I will considere this layer sequence, thanks for your advice!!! 🙂
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