FEDEVEL
Platform forum

Silkarian , 10-04-2025, 09:37 AM

Dear all, I have a question that I need help with. I am helping a friend who is designing a 3 Degrees of Freedom gymbal that incorporates 3 PCBs. On the PCB there two connectors (say P1, P2). Each carries 3.3 V, GND, SCL, SDA. My friend inserted ferrite beads in series with these nets per connector. Now, to me this does not look good. For I²C to function, all boards in the chain must share exactly the same nets for GND, VCC, SDA, SCL. By “isolating” them with ferrite beads, we are effectively creating four separate buses that aren’t tied together. GND of P1 ≠ GND of P2. Same for VCC, SCL, SDA. This is incorrect right?
Also, the original design has ferrites at the SDA and SCL lines of the connectors. What do you think about that? in my opinion the ferrites on SDA and SCL are not needed according to some application notes. Any advice is highly appreciated.

QDrives , 10-04-2025, 03:07 PM

You are **not** 'isolating' the nets with ferrites.
You **are** adding inductance and that filters the signal making it worse.
There are special I2C IC that is a extender or redriver, such as https://www.ti.com/product/P82B715?qgpn=p82b715 **IF needed!**

Silkarian , 10-05-2025, 12:09 PM

I do agree with the comment that ferrites could potentially degrade the signle integrity, however, I have found application notes showcasing that SMT multilayer ferrites in combination with ESD protection diodes practically do not influence the data signal (SDA) and clock signal (SCL) of the I²C bus. The edge steepness of the signals is mostly influenced by the pull-up resistors in combination with the parasitic bus capacitance. In return, this component combination of ESD protection diode and broadband SMT ferrite increases the noise immunity of the I²C bus. In practice, this means a higher immunity to ESD, burst and radiated RF, especially at frequencies below 400kHz. These boards need to pass EMC Tests based IEC 61326-1 and Safety requirements electrical equipment test based on IEC 61010-1. So I would say that in this case these ferittes and TVS would actually help since each PCB is connected via a shielded cable.
My question was about whether I should connect the VCC, GND and SDA and SCL lines before the ferrites. If I don't, I am looking at a daisy chain configuration (see first picture). By connecting these nets together before the ferites (on each board) I am creating the configuration in picture 2. Think of an example case scenario where the first ferrite of the GND is not connected sufficiently. This open circit would result to a floating ground for the other two PCBs.
That is my question.

QDrives , 10-05-2025, 07:03 PM

"*...this means a higher immunity to ESD, burst and radiated RF...*" -- It depends. It will make it worse at some frequencies unless addressed.
"*...especially at frequencies below 400kHz...*" -- There it will not do anything.
As for method 1 or 2, that depends on the layout. If the connectors are side by side, options 2 might better, if they are at opposite ends of the board, option 1 might be better.