FEDEVEL
Platform forum

Neetusha , 02-17-2026, 07:55 PM

Hi, Is it okay to have a Vcc plane below the GND plane ina 4 layer board. Will it cause signal integrity issues?Signals are on both the top layer as well the bottom layer. I need a Vcc plane for sure. Do you think I should go for a 6 layer board, wherein the Vcc layer is sandwiched between the GND Layers?

QDrives , 02-18-2026, 12:57 AM

If you use power as a reference layers, you should add capacitors to allow the return currents to return to Gnd close to your via transitions from top to bottom and 'normal' vias cannot be used (creates a short 😉 )

Robert Feranec , 02-18-2026, 07:13 AM

depends what you are designing. Right now I keep experimenting with 4 layer stackup ... if possible i use GND on L2 and L3 and route power on L1 and/or L4. If not possible I make L3 nice GND, route most of the signals on L4 and on L2 I make GND planes under important signals, then use stitching vias between GND on L2 and L3.

Neetusha , 02-19-2026, 03:25 PM

An alternative to my initial plan, that I was thinking of is to have GND layers on layer 2 and layer 3. Signals layer on say layer 1. And on layer 4, I keep the amount of signals less. And for the Vcc, I can create a polygon pour instead of a plane on layer 4. Is there anything I need to care while routing signals over the polygon pour? The few signals on layer 4 are the one s that are part of the signals on layer 1. And there are regions on the polygon pour where they pass.

Neetusha , 02-19-2026, 03:27 PM

Also, do I need to use stiching vias for connecting the layer 1 signals to layer 4 signals

QDrives , 02-19-2026, 07:55 PM

"*...routing signals over the polygon pour...*" -- If one the **same layer**: the polygon pour automatically leaves space for any different net traces you place in the same area.
If you mean on a **different layer**: Nothing special.

Yes you need stiching vias for layer 1 <--> 4 transitions.

Neetusha , 02-20-2026, 09:03 PM

I have a question regarding the stiching vias.
When a signal transitions from layer 1 to 4, do we keep the stiching vias close to the via where the transition occurs? Or do we surround the signal path with stiching vias as shown in Altium videos?
Also, how many stiching vias do we keep near a via? And how close do we keep them to the signal path or the via?

QDrives , 02-21-2026, 04:48 PM

It depends...
How fast are your signals?
The stitching of the entire board has a different reason than the stitching vias for the signals. The first is more optional, the second more mandatory.