QSPI NOR Flash traces length matching
bremenpl , 04-09-2019, 02:09 PM
Hello there,
I need to interface with an external NOR Flash chip via QSPI (XIP mode). My MCU will not run at higher frequency than 80 Mhz, so QSPI frequency is exactly that.
I have managed to connect all traces the way it can be seen in the attachment. In my opinion, the positive aspects of such routing are:
1. No VIa's,
2. The clock line is not close to any data line.
3. The clock line is straight, no serpents on it.
The cons I see are:
1. Lengths mismatch,
2. Clock line is the shortest.
I was wondering either for 80 Mhz I should incorporate length matching. I have preliminarly checked the possibilities, and I figured out that I could connect the chip with quite even traces, apart from #CS line, which would also need a via. What do you think? I would appreciate all help.
PS: I have uploaded also a second routing option with lengths matched, but clock signal is not straight anymore...
I need to interface with an external NOR Flash chip via QSPI (XIP mode). My MCU will not run at higher frequency than 80 Mhz, so QSPI frequency is exactly that.
I have managed to connect all traces the way it can be seen in the attachment. In my opinion, the positive aspects of such routing are:
1. No VIa's,
2. The clock line is not close to any data line.
3. The clock line is straight, no serpents on it.
The cons I see are:
1. Lengths mismatch,
2. Clock line is the shortest.
I was wondering either for 80 Mhz I should incorporate length matching. I have preliminarly checked the possibilities, and I figured out that I could connect the chip with quite even traces, apart from #CS line, which would also need a via. What do you think? I would appreciate all help.
PS: I have uploaded also a second routing option with lengths matched, but clock signal is not straight anymore...
Paul van Avesaath , 04-09-2019, 04:01 PM
80 Mhz, is not that crucial you do not need length matching here... i would stick with you first connection
Comments:
bremenpl, 04-10-2019, 02:42 AM
Will do that, thanks.
robertferanec , 04-17-2019, 06:00 AM
Normally, when you keep everything short and similar length, there are no problems (usually no length matching is needed).
However, if you are worried, as an example, you can use IDE guidelines from COM Express design guide (page 192, I think that is like 50MHz interface): https://www.kontron.com/downloads/wh...?product=89380
However, if you are worried, as an example, you can use IDE guidelines from COM Express design guide (page 192, I think that is like 50MHz interface): https://www.kontron.com/downloads/wh...?product=89380
milos.stankovic , 06-18-2020, 04:23 AM
Hi!
I would ask one more question - Should series termination resistors be placed and where exactly? For SCK I would put series resistor close to CPU, but I am not sure about IO1-IO3 and CS lines. Also, should there be pull up resistors and where they should be placed?
Best regards,
Miloš
I would ask one more question - Should series termination resistors be placed and where exactly? For SCK I would put series resistor close to CPU, but I am not sure about IO1-IO3 and CS lines. Also, should there be pull up resistors and where they should be placed?
Best regards,
Miloš
robertferanec , 06-19-2020, 05:49 AM
- Series termination resistors should be placed close to Output.
- Pull ups are often placed close to inputs.
- Pull ups are often placed close to inputs.
Comments:
milos.stankovic, 07-14-2020, 04:57 AM
Thanks. I placed resistors as you suggested. I was confused a little bit about data signals since they are bidirectional.Regards,Milos
robertferanec , 07-16-2020, 04:23 AM
Usually for series termination on data signals for memory interface I have seen these placed close to CPU.
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