In continuation ...
The voltage rails are
VBUS - 5.145V (PMIC supply)
SW1 - 1.389V
SW2 - 1.355V
SW3 - 3.340V
VLDO1 - 1.802V
VLDO2 - Unconnected
VLDO3 - 3.296
VSNVS - 3.041V
DDR_VREF - 0.676V
on power on with POR_B floating POR_B - 3.309V
Tried powering up the board with POR_B pulled down released after > 5 sec - No detection
Tried pulling down POR_B after 10 sec of PMIC power on (initially with POR_B floating) - no detection
XTALABS07-32.768kHZ-9-TESR - 70kOhm
Load Cap - 9pF and
board cap is 9pF +/- 0.1pFASDMB-24.000MHZ-XY-TStability +/- 10ppm (not checked)
Output load 10kOhm
Load Cap - 15pF
Board Cap 15pF (1%)Deviation - 2.2M registor to GND for XTALI bias not externally adjustable
Q: Based on the schematic i have shared, are the board caps correct?Hardware Development Guide for the i.MX 6UltraLite Applications ProcessorDone that.the only deviations are
Since BOOT_MODE[1:0] have an on chip pulldown (Page 12) are not connected externally to GND at 00
Kept Floating
USB_OTG1_ID - Type A connector not microusb - Grounded on chip
USB_OTG1_OC
USB_OTG_PWR
I am severely hampered due to lack of oscilloscope, short of that is there anything else i can try?
Again, any ideas & help is appreciated.Regards,