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How to check length matching details for this Ethernet PHY DP83822IRHBT ? please suggest any one

kabaleeswaran , 07-11-2024, 01:13 PM
Hello all,
i am using DP83822IRHBT ethernet IC , but I could not see any length matching details for RX , TX for data signals. I can see only general layout Guidelines . can any one suggest how to match the data signal for RX and TX . where I can see the length matching or tolerance details. please check image
QDrives , 07-11-2024, 08:08 PM
The length match tolerance depends on the signal edge rise time, timing tolerance (skew) and propagation velocity.
Are you talking about the MII interface? You can diagnose the signal edge rise time from the IBIS model.
Propagation velocity is C/sqrt(Dk).

If Dk=4, take skew=100ps, you have 15mm.
kabaleeswaran , 07-13-2024, 03:18 PM
can you tell me.. tolerance information not specified in datasheet itself ? so i need to download the IBIS model for DP83822IRHBT (ethernet PYI)
QDrives , 07-13-2024, 06:39 PM
The datasheet shows SkewR with a minimum value of 1ns. Lets take 10% of that, which gives you 100ps.
Similarly you need to see in the CPU what they need.
IBIS models can be used to get signal rise time. This is more for termination or when things are getting critical.
kabaleeswaran , 07-15-2024, 06:51 AM
Thanks for your updated.. but I discussed with our Hardware team.. we are using MII interface , below you can see this. how to change the timing parameter 25ns or 100ns as length. is any calculation is there ? currently i am using Altium.. is any possible to change the timing parameter to length ? ex : TX or RX group to be match with in 100mil tolerance
Arkev , 07-15-2024, 10:47 AM
In the schematics you can add a differential pair on your lines, it will then add a rule to your PCB design
Arkev , 07-15-2024, 10:50 AM
Also, when selecting your track in the PCB design, you should be able to see the propagation time and the net length in the properties panel
QDrives , 07-15-2024, 07:56 PM
With the 100ps skew you have 15mm length mismatch tolerance. You state that you will match it within 2.54mm. So what is the problem?
QDrives , 07-15-2024, 07:57 PM
Well no, Altium will not add a rule to the PCB, but you are able to do so.
kabaleeswaran , 07-16-2024, 02:55 PM
Hi Qdrives, sorry for the misunderstood from your end. For example, generally length tolerance specified in datasheet. so I will follow. but you mention skew is 100ps ; **so 15mm length tolerance **. how you defined ? is any calculation to convert pico second to length ?
QDrives , 07-16-2024, 09:21 PM
I stated "take skew=100ps". Note the word "take".
I took 10% of the lowest time 1ns in the datasheet.
If the datasheet mentions that the length tolerance should be within 2.54mm, and the skew tolerance allows for 15mm, then there is no problem on using the 2.54mm for skew.

"*is any calculation to convert pico second to length ?*" -- Yes.
**x = v * t**, x=distance, v=velocity and t=time.
And **v = C/sqrt(Dk)**, with C being 300mm/ns and Dk around 4.0 you get about 150mm/ns.
Robert Feranec , 07-17-2024, 08:45 AM
just would like to add, be very careful, some MII interfaces need delay in PCB, some have integrated delay ... read more about it on internet. It looks like, your chip may have the option
QDrives , 07-17-2024, 07:55 PM
That is the RGMII timing table. the MII timing table is a lot shorter.
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